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| Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using 'trench' technolgy the device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in automotive and general purpose switching applications. BUK7880-55 QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 55 7.5 1.8 150 80 UNIT V A W C m PINNING - SOT223 PIN 1 2 3 4 gate drain source drain (tab) DESCRIPTION PIN CONFIGURATION 4 SYMBOL d g s 1 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID ID IDM Ptot Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tsp = 25 C On PCB in Fig.2 Tamb = 25 C On PCB in Fig.2 Tamb = 100 C Tsp = 25 C Tsp = 25 C On PCB in Fig.2 Tamb = 25 C MIN. - 55 MAX. 55 55 16 7.5 3.5 2.2 40 8.3 1.8 150 UNIT V V V A A A A W W C ESD LIMITING VALUE SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model (100 pF, 1.5 k) MIN. MAX. 2 UNIT kV April 1998 1 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET THERMAL RESISTANCES SYMBOL Rth j-sp Rth j-amb PARAMETER From junction to solder point From junction to ambient CONDITIONS Mounted on any PCB Mounted on PCB of Fig.18 TYP. 12 - BUK7880-55 MAX. 15 70 UNIT K/W K/W STATIC CHARACTERISTICS Tj= 25C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current Gate-source breakdown voltage Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA Tj = -55C VDS = VGS; ID = 1 mA Tj = 150C Tj = -55C VDS = 55 V; VGS = 0 V; VGS = 10 V IG = 1 mA; VGS = 10 V; ID = 5 A Tj = 150C Tj = 150C Tj = 150C MIN. 55 50 2 1.2 16 TYP. 3 0.05 0.04 65 MAX. 4 4.4 10 100 1 10 80 148 UNIT V V V V A A A A V m m DYNAMIC CHARACTERISTICS Tmb = 25C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time CONDITIONS VDS = 25 V; ID = 5 A; Tj = 25C VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 1 TYP. 4 365 110 60 9 15 18 12 MAX. 500 135 85 14 25 27 18 UNIT S pF pF pF ns ns ns ns VDD = 30 V; ID = 7 A; VGS = 10 V; RG = 10 ; Tj = 25C REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = -55 to 175C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Tsp = 25C Tsp = 25C IF = 5 A; VGS = 0 V IF = 5 A; -dIF/dt = 100 A/s; VGS = -10 V; VR = 30 V MIN. TYP. 0.85 38 0.2 MAX. 7.5 40 1.1 UNIT A A V ns C April 1998 2 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET AVALANCHE LIMITING VALUE SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 2.5 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tsp = 25 C MIN. TYP. - BUK7880-55 MAX. 30 UNIT mJ 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 100 ID/A RDS(ON) = VDS/ID 10 tp = 1 us 10us 100 us 1 ms 10ms 100ms DC 1 0 20 40 60 80 100 Tmb / C 120 140 0.1 1 10 VDS/V 100 Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tsp) Fig.3. Safe operating area. Tsp = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp Zth/ (K/W) 120 110 100 90 80 70 60 50 40 30 20 10 0 ID% Normalised Current Derating 100 10 0.5 0.2 1 0.1 0.05 0.02 P D tp D= tp T t 0.1 T 0 20 40 60 80 Tmb / C 100 120 140 0.01 1.0E-06 0.0001 t/s 0.01 1 100 Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tsp); conditions: VGS 10 V Fig.4. Transient thermal impedance. Zth j-sp = f(t); parameter D = tp/T April 1998 3 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET BUK7880-55 40 ID/A 30 16 12 10 9.5 9.0 8.5 8.0 7.5 9 gfs/S 8 7 6 5 4 3 2 20 7.0 6.5 10 6.0 5.5 0 5.0 4.5 4.0 0 2 4 VDS/V 6 8 10 0 5 10 ID/A 15 20 Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS RDS(ON)/mOhm Fig.8. Typical transconductance, Tj = 25 C. gfs = f(ID); conditions: VDS = 25 V 130 120 110 100 90 80 70 60 2.5 6 a BUK98XX-55 Rds(on) normalised to 25degC 2 6.5 7 8 9 10 1.5 1 0 5 10 ID/A 15 20 25 30 0.5 -100 -50 0 50 Tmb / degC 100 150 200 Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS 20 ID/A 15 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 5 A; VGS = 10 V VGS(TO) / V max. 4 typ. 3 BUK78xx-55 5 10 min. 2 5 1 Tj/C = 0 150 25 0 1 2 3 4 5 VGS/V 6 7 8 9 0 -100 -50 0 50 Tj / C 100 150 200 Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS April 1998 4 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET BUK7880-55 1E-01 Sub-Threshold Conduction 40 IF/A 1E-02 2% typ 98% 30 Tj/V = 20 150 25 1E-03 1E-04 10 1E-05 1E-06 0 0 1 2 3 4 5 0 0.5 1 VSDS/V 1.5 2 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS 1 .9 .8 Thousands pF .7 .6 .5 .4 .3 .2 .1 0 0.01 0.1 1 VDS/V 10 Coss Crss 100 Ciss Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj WDSS% 120 110 100 90 80 70 60 50 40 30 20 10 0 20 40 60 80 100 Tmb / C 120 140 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 12 VDS/V 10 Fig.15. Normalised avalanche energy rating. WDSS% = f(Tsp); conditions: ID = 2.5 A + L VDS = 14V VDD 8 VDS = 44V 6 VDS VGS 0 RGS T.U.T. R 01 shunt -ID/100 4 2 0 0 5 QG/nC 10 15 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 7 A; parameter VDS Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS - VDD ) April 1998 5 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET BUK7880-55 + RD VDS VGS 0 RG T.U.T. VDD - Fig.17. Switching test circuit. April 1998 6 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET PRINTED CIRCUIT BOARD BUK7880-55 Dimensions in mm. 36 18 60 9 4.6 4.5 10 7 15 50 Fig.18. PCB for thermal resistance and power rating for SOT223. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 m thick). April 1998 7 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET MECHANICAL DATA Dimensions in mm Net Mass: 0.11 g 0.32 0.24 6.7 6.3 3.1 2.9 B BUK7880-55 0.2 M A 4 A 0.10 0.02 3.7 3.3 13 7.3 6.7 16 max 1 10 max 1.8 max 1.05 0.85 4.6 2.3 2 0.80 0.60 3 0.1 M (4x) B Fig.19. SOT223 surface mounting package. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL94 V0 at 1/8". April 1998 8 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET DEFINITIONS Data sheet status Objective specification Product specification Limiting values BUK7880-55 This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1998 9 Rev 1.100 |
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